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T1024RDB 데이터시트(PDF) 33 Page - Freescale Semiconductor, Inc |
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T1024RDB 데이터시트(HTML) 33 Page - Freescale Semiconductor, Inc |
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33 / 49 page ![]() Table 2-11. POR configuration through switches (continued) Switch Signal name Pin name Signal meaning Setting 100: boot from VBANK4 with RCW 0x135 for 2.5G SGMII mode See note1 SW3[8] TEST_SEL_N TEST_SEL_B - 1. SW3[5:7] can be used to change the starting address for the memory banks. The NOR flash memory is divided into eight memory banks with 16 MB size each. Eight different U-Boot images can be programmed into each memory bank. When NOR flash is selected as boot flash, different U-Boot images can be selected to boot up the board, by setting SW3[5:7]. NOTE For other DIP switch settings and definitions, see T1024 QorIQ Integrated Multicore Communications Processor Data Sheet . Chapter 2 Architecture QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015 Freescale Semiconductor, Inc. 33 |
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