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LIS2MDL 데이터시트(PDF) 12 Page - STMicroelectronics |
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LIS2MDL 데이터시트(HTML) 12 Page - STMicroelectronics |
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12 / 41 page ![]() Module specifications LIS2MDL 12/41 DocID030621 Rev 5 2.4.2 I2C - inter-IC control interface Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values (standard and fast mode) Symbol Parameter I2C standard mode (1) I2C fast mode (1) Unit Min Max Min Max f(SCL) SCL clock frequency 0 100 0 400 kHz tw(SCLL) Low period of the SCL clock 4.7 1.3 μs tw(SCLH) High period of the SCL clock 4.0 0.6 tsu(SDA) Data setup time 250 100 ns th(SDA) Data hold time 0 3.45 0 0.9 μs th(ST) START condition hold time 4 0.6 tsu(SR) Setup time for a repeated START condition 4.7 0.6 tsu(SP) Setup time for STOP condition 4 0.6 tw(SP:SR) Bus free time between STOP and START condition 4.7 1.3 1. Data based on standard I2C protocol requirement, not tested in production. Table 8. I2C slave timing values (fast mode plus and high speed) Symbol Parameter I2C fast mode plus(1) I2C high speed(1) Unit Min Max Min Max f(SCL) SCL clock frequency 0 1 0 3.4 MHz tw(SCLL) Low period of the SCL clock 0.5 0.16 μs tw(SCLH) High period of the SCL clock 0.26 0.06 tsu(SDA) Data setup time 50 10 ns th(SDA) Data hold time 0 0 0.07 μs th(ST) START condition hold time 0.26 0.16 tsu(SR) Setup time for a repeated START condition 0.26 0.16 tsu(SP) Setup time for STOP condition 0.26 0.16 tw(SP:SR) Bus free time between STOP and START condition 0.5 1. Data based on standard I2C protocol requirement, not tested in production. |
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