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ATTINY817-MFR. 데이터시트(PDF) 36 Page - Microchip Technology |
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ATTINY817-MFR. 데이터시트(HTML) 36 Page - Microchip Technology |
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36 / 492 page ![]() Figure 8-1. AVR CPU Architecture Register file Flash program memory Program counter Instruction register Instruction decode Data memory ALU Status register R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 (XL) R27 (XH) R28 (YL) R29 (YH) R30 (ZL) R31 (ZH) Stack pointer The Arithmetic Logic Unit (ALU) supports arithmetic and logic operations between registers or between a constant and a register. Single-register operations can also be executed in the ALU. After an arithmetic operation, the status register is updated to reflect information about the result of the operation. The ALU is directly connected to the fast-access register file. The 32 8-bit general purpose working registers all have single clock cycle access time allowing single-cycle arithmetic logic unit operation between registers or between a register and an immediate. Six of the 32 registers can be used as three 16-bit address pointers for program and data space addressing, enabling efficient address calculations. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 36 |
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