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FS32K112BHTXVLFTR 데이터시트(PDF) 67 Page - NXP Semiconductors |
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FS32K112BHTXVLFTR 데이터시트(HTML) 67 Page - NXP Semiconductors |
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67 / 100 page ![]() Table 46. LPSPI electrical specifications1 (continued) Descripti on Conditions Run Mode2 HSRUN Mode2 VLPR Mode (S32K1xx) VLPR Mode (S32K14xW) Un it 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Master - - - - - - - - Master Loopback5 Master Loopback(sl ow)6 4 tLag9 Enable lag time (After SPSCK delay) Slave - - - - - - - - - - - - - - - - ns Master - - - - - - - - Master Loopback5 Master Loopback(sl ow)6 5 tWSPSC K 10 Clock(SPS CK) high or low time (SPSCK duty cycle) Slave ns Master Master Loopback5 Master Loopback(sl ow)6 6 tSU Data setup time(input s) Slave 3 - 5 - 3 - 5 - 18 - 18 - 55 - 55 - ns Master 29 - 38 - 26 - 3711 32 12 - 72 - 78 - 145 - 145 - Table continues on the next page... |
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