IIS2MDCTR datasheet(31/40 Pages) STMICROELECTRONICS

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IIS2MDC

8.6

CFG_REG_B (61h)

Table 27. CFG_REG_B_M register

Table 28. CFG_REG_B_M register description

OFF_

CANC_

ONE_

SHOT

INT_on_

DataOFF

Set_FREQ

OFF_CANC

LPF

OFF_CANC_

ONE_SHOT

Enables offset cancellation in single measurement mode. The OFF_CANC bit

must be set to 1 when enabling offset cancellation in single measurement mode.

Default value: 0

(0: offset cancellation in single measurement mode disabled;

1: offset cancellation in single measurement mode enabled)

INT_on_

DataOFF

If ‘1’, the interrupt block recognition checks data after the hard-iron correction to

discover the interrupt. Default value: 0

Set_FREQ

Selects the frequency of the set pulse. Default value: 0

(0: set pulse is released every 63 ODR;

1: set pulse is released only at power-on after PD condition)

OFF_CANC

Enables offset cancellation. Default value: 0

(0: offset cancellation disabled; 1: offset cancellation enabled)

LPF

Enables low-pass filter (see Table 29). Default value: 0

(0: digital filter disabled; 1: digital filter enabled)

Table 29. Digital low-pass filter

CFG_REG_B[LPF]

BW [Hz]

0 (disable)

ODR/2

1 (enable)

ODR/4

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