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TAS5822MDCPR 데이터시트(PDF) 55 Page - Texas Instruments |
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TAS5822MDCPR 데이터시트(HTML) 55 Page - Texas Instruments |
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55 / 90 page ![]() 7.6.1.21 ANA_CTRL Register (Offset = 53h) [reset = 0x00] ANA_CTRL is shown in Figure 7-33 and described in Table 7-29. Return to Table 7-7. Figure 7-33. ANA_CTRL Register 7 6 5 4 3 2 1 0 ANA_CTRL R/W Table 7-29. ANA_CTRL Register Field Descriptions Bit Field Type Reset Description 7 ANA_CTRL R/W 0 Fast Hiz control enable in clock halt 6-5 00 Class-D bandwidth control, "00": 80kHz; "01": 100kHz; "10": 120kHz; "11": 175kHz. With 768kHz or 1.024MHz switching frequency, bandwidth need set to 175kHz for best audio performance 4-1 0000 These bits are reserved 0 0 Channel L and R PWM output of phase control . 1: In phase 0: Out of phase www.ti.com TAS5822M SLASEV8 – DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 55 Product Folder Links: TAS5822M |
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