ZSC31014 datasheet(13/59 Pages) RENESAS

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ZSC31014 Datasheet

January 20, 2016

Circuit Description

2.1. Signal Flow and Block Diagram

The ZSC31014 uses a charge-balancing ADC that provides low noise 14-bit samples. The system clock can

operate at 1MHz (lower power, better noise performance) or 4MHz (faster sample rates). The PreAmp nulls its

offset over temperature and offers a wide range of selectable analog gain settings. The on-chip digital signal

processor (DSP) core uses coefficients stored in EEPROM to precisely calibrate/condition the amplified

differential input signal. Temperature can be measured from an internal temperature sensor, which can be

calibrated and output as well as used to compensate for temperature effects of the sensor bridge.

Direct interfacing to µP controllers is facilitated via I

2C™ digital protocol or optional SPI. I2C™ is used as the

calibration interface and can be used in the final application. SPI is only supported for end applications.

Figure 2.1

ZSC31014 Block Diagram

INMUX

PreAmp

VDD

(2.7V - 5.5V)

VSS

EEPROM w/

Charge Pump

& Checksum

DSP

Core

POR/Oscillator

14-Bit ADC

2C™ or SPI

Interface

Temperature

Reference

VBP

RBiciLite™

ZSC31014

Bsupply

Optional

Bsink

0.1µF

INT/SS

SDA/MISO

SCL/SCLK

Sensor

Diagnostics

VBN

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