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AX88852 데이터시트(PDF) 35 Page - ASIX Electronics Corporation |
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AX88852 데이터시트(HTML) 35 Page - ASIX Electronics Corporation |
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35 / 39 page ![]() AX88850 PRELIMINARY ASIX ELECTRONICS CORPORATION 35 Symbol Description Min Typ. Max Units T4 RX_CLK Clock Cycle Time 39.996 40 40.004 ns T5 RX_CLK Clock High Time 14 20 26 ns T6 CRS to RXE Assertion Delay 20 ns T7 CRS to RXE De-assertion Delay 120 200 ns T8 CRS to RXDV Delay Requirement 40 160 ns T9 RXD or RXDV setup to RX_CLK rise time 10 - ns 5.4.2 Station Management T1 T2 SMDC T3 T4 T5 SMDIO Write Write T6 T7 /SMDV Read SMDIR Write T8 BSMDC BSMDIO Symbol Description Min Typ. Max Units T1 SMDC Period 400 - ns T2 SMDC High Time 40 - ns T3 SMDIO Setup Time to SMDC High(Write) 10 - ns T4 SMDIO Hold Time to SMDC High(Write) 10 - ns T5 SMDIO Valid from SMDC High(Read) 50 ns T6 /SMDV Setup Time to SMDC High 10 - ns T7 /SMDV Hold Time to SMDC High 10 - ns T8 BSMDIO Buffer Delay Time 20 ns |
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