A6986ITR datasheet(29/62 Pages) STMICROELECTRONICS

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Application notes

7.1

Output voltage adjustment

Primary output voltage

The error amplifier reference voltage is 0.85 V typical. The output voltage is adjusted accordingly to the equation

below:

VOUT_pri= 0.85∙1+R1R2

(23)

where R1 and R2 are the resistors used in the output divider (see figure below).

Figure 31. A6986I application circuit

The integration of a P-channel MOSFET as high-side switch theoretically allows duty cycle up to 100%.

Nevertheless, in an iso-buck architecture some restrictions should be considered. A general recommendation

is to keep the duty-cycle below 50-60%. A higher duty cycle would limit off-time, limiting the time in which the

energy transfer to the secondary side takes place.

Other restrictions in the duty cycle selection arise due to the minimum on-time (see Section 7.2 Switching

frequency), generally summarized by the following equation:

D ≥ DMIN = TON MIN∙fSW

(24)

Secondary output voltage

In the iso-buck converter, the secondary output voltage is not included in the regulation loop. Nevertheless, a

good regulation of the secondary output voltage is achieved by relying on the primary output voltage regulation,

the selection of a proper turn ratio of the transformer as well as considering the voltage drops due to the

secondary winding resistance and the Schottky diode. That can be summarized by the following equation:

VOUT_sec=N∙VOUT_pri+IOUTpri∙RDSonLS+Rwind_pri ‐Rwind_sec∙IOUT_sec‐VFD1

(25)

where N is the turn ratio, Rwind_prim and Rwind_sec are the winding resistances of the primary and secondary side

respectively and VFD1 is the forward voltage of the Schottky diode.

If no current is drawn from the primary output, equation (25) can be simplified as follows:

VOUT_sec=N∙VOUTpri−Rwind_sec∙IOUT_sec−VFD1

(26)

A6986I

Application notes

DS13481 - Rev 2

page 29/62

A6986ITR 데이터시트(PDF) 29 Page - STMicroelectronics