L6911ETR datasheet(6/20 Pages) STMICROELECTRONICS

6 / 20 page

L6911E

6/20

VCC =12V

VCC =5V

Switching frequency variations vs. RT are reported in Fig.1.

Note that forcing a 50

µA current into this pin, the device stops switching because no current is delivered to the

oscillator.

Figure 1.

Digital to Analog Converter

The built-in digital to analog converter allows the adjustment of the output voltage from 1.050V to 1.825V with

25mV binary steps as shown in the previous table 1. The internal reference is trimmed to ensure the precision

of 1%.

The internal reference voltage for the regulation is programmed by the voltage identification (VID) pins. These

are TTL compatible inputs of an internal DAC that is realised by means of a series of resistors rpoviding a par-

tition of the internal voltage reference. The VID code drives a multiplexer that selects a voltage on a precise

point of the divider. The DAC output is delivered to an amplifier obtaining the VPROG voltage reference (i.e. the

set-point of the error amplifier). Internal pull-ups are provided (realized with a 5

µA current generator); in this

way, to program a logic ”1” it is enough to leave the pin floating, while to program a logic ”0” it is enough to short

the pin to GND.

The voltage identification (VID) pin configuration also sets the power-good thresholds (PGOOD) and the over-

voltage protection (OVP) thresholds.

Soft Start and Inhibit

At start-up a ramp is generated charging the external capacitor CSS by means of a 10µA constant current, as

shown in figure 2.

When the voltage across the soft start capacitor (VSS) reaches 0.5V the lower power MOS is turned on to dis-

charge the output capacitor. As VSS reaches 1V (i.e. the oscillator triangular wave inferior limit) also the upper

200kH z

4.306 10

⋅

T k Ω

()

-----------------------------

200k H z

15 10

⋅

T k Ω

()

--------------------

10 0

1000

Fr equency [ kH z]

100

1000

10000

RT to G N D

RT to V CC= 12 V

RT to V CC= 5V

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