전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

WM8774IFT 데이터시트(PDF) 10 Page - Wolfson Microelectronics plc

부품명 WM8774IFT
상세설명  24 - bit, 192kHz 8 - Channel Input Stereo Codec
PDF  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8774IFT 데이터시트(HTML) 10 Page - Wolfson Microelectronics plc

Back Button WM8774IFT Datasheet HTML 6Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 7Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 8Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 9Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 10Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 11Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 12Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 13Page - Wolfson Microelectronics plc WM8774IFT Datasheet HTML 14Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 42 page
background image
WM8774
Product Preview
PP Rev 1.0 June 2002
10
DIGITAL AUDIO INTERFACE – SLAVE MODE
BCLK
DOUT
ADCLRC
DIN
DACLRC
WM8774
CODEC
DVD
Controller
Figure 4 Audio Interface – Slave Mode
BCLK
DACLRC/
ADCLRC
t
BCH
t
BCL
t
BCY
DIN
DOUT
t
LRSU
t
DS
t
LRH
t
DH
t
DD
Figure 5 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25
oC, Slave Mode, fs = 48kHz, MCLK = 256fs unless otherwise
stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
50
ns
BCLK pulse width high
tBCH
20
ns
BCLK pulse width low
tBCL
20
ns
DACLRC/ADCLRC set-up
time to BCLK rising edge
tLRSU
10
ns
DACLRC/ADCLRC hold
time from BCLK rising edge
tLRH
10
ns
DIN set-up time to BCLK
rising edge
tDS
10
ns
DIN hold time from BCLK
rising edge
tDH
10
ns
DOUT propagation delay
from BCLK falling edge
tDD
0
10
ns
Table 3 Digital Audio Data Timing – Slave Mode
Note:
1.
ADCLRC and DACLRC should be synchronous with MCLK, although the WM8774 interface is tolerant of phase
variations or jitter on these signals.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com