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ADA4255ACPZ-R7 데이터시트(PDF) 31 Page - Analog Devices

부품명 ADA4255ACPZ-R7
상세설명  Zero Drift, High Voltage, Programmable Gain Instrumentation Amplifier with Charge Pump
PDF  64 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADA4255ACPZ-R7 데이터시트(HTML) 31 Page - Analog Devices

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Data Sheet
ADA4255
THEORY OF OPERATION
analog.com
Rev. 0 | 31 of 64
When configured for SCS mode, communication with the ADA4255
and all slave devices follows a predefined pattern. The first CS
pulse is passed to the first GPIOx that is set up for SCS mode, ef-
fectively communicating with the first slave device. Subsequent CS
pulses progress through any GPIOx pins configured for SCS mode
in ascending order. The last CS pulse addresses the ADA4255
itself. This pattern repeats until SCS mode is disabled.
Figure 92 and Figure 93 show the ADA4255 operating in SCS
mode with GPIO0 and GPIO1 communicating with two slave devi-
ces. GPIO0 is connected to the CS line of an ADC, and GPIO1 is
connected to the CS line of a digital-to-analog converter (DAC).
Figure 92. Typical SCS Implementation with Devices Without SDO Tristate Support
Figure 93. Typical SCS Implementation with All Devices Supporting SDO Tristate



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