PD70210AL datasheet(19/36 Pages) MICROCHIP

19 / 36 page

...........continued

Number

Designator

Description

VSN

The negative input of the internal differential-sense voltage amplifier. Note that the

common-mode range of the differential voltage amplifier is 3.5V and its gain is 7.

This differential amplifier can be used for implementing topologies where the

“system (output) ground” is different from the IC ground. Both output rails (output

rail and its return) can then be step-downed, by equal amounts, using identical

voltage dividers, to bring the voltage below 3.5V. Then, differential sensing can be

used, and finally the output of the differential voltage amplifier (pin DAO) can be

connected to the FB pin.

VSP

The positive input of the internal differential-sense voltage amplifier. Note that it

must always be connected in such a way that VSP is at a higher voltage than VSN.

Also, keep in mind that since the differential voltage amplifier has a gain of 7 and

the output of that amplifier is connected to the feedback pin, which compares that

against a 1.2V reference, in effect, the difference between VSP and VSN stabilizes

to 1.2V/7 = 0.171V in steady state. That is how the (identical) voltage dividers

present on VSP and VSN are designed.

COMP

This is the output of the internal error amplifier, and the input of the PWM

comparator. It is brought out to support isolated topologies because in such cases,

there is an error amplifier already present on the secondary side (for example, a

TL431 or equivalent). Therefore, the error amplifier of the converter section can be

passed. On the other hand, in non-isolated topologies, the error amplifier of the

converter can be used directly or through the differential voltage amplifier stage.

DAO

This is the output of the internal differential voltage amplifier (gain = 7). When this

amplifier is used, DAO is connected to the feedback pin (FB). Part of the

compensation network is between the two pins, and this network is typical of any

Type 3 error amplifier input, with or without a differential amplifier.

This is the feedback pin of the IC. It is internally compared to a 1.2V reference. If

the internal error amplifier is not used and the COMP pin is being used to inject the

error signal (as in isolated topologies), the FB pin can be either tied high (to VDD),

or connected to COMP.

GND

This is the IC ground or the analog (quiet) ground of the IC. Pin 20 is the Power

Ground (PGND). Typically, the analog ground and PGND can be connected on a

copper island on the component side, and then connect that through several vias

very close to the chip on to a large ground plane which extends up to the lower side

of the current sense resistor. All chip decoupling can then be very simple with

respect to the copper island on the component side.

This is created by an internal LDO and basically provides a housekeeping rail for

the IC itself, which is 5V with respect to the IC ground. A 1 µF ceramic cap placed

close to this pin, connected to IC ground is recommended for proper decoupling.

This pin can also provide up to 5 mA for external circuitry if required, thermal

aspects (IC dissipation) being considered.

PD70211

Pin Configuration

Datasheet

DS00003672A-page 19

PD70210AL 데이터시트(PDF) 19 Page - Microchip Technology

PD70210AL 데이터시트(HTML) 19 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

데이터시트 다운로드

링크 URL