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PLL102-15SC 데이터시트(PDF) 2 Page - PhaseLink Corporation

부품명 PLL102-15SC
상세설명  Low Skew Output Buffer
PDF  8 Pages
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제조업체  PLL [PhaseLink Corporation]
홈페이지  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PLL102-15SC 데이터시트(HTML) 2 Page - PhaseLink Corporation

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PLL102-15
Low Skew Output Buffe r
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/06/03 Page 2
PIN DESCRIPTIONS
Name
Number
Type
Description
VDD
1
P
3.3V Power Supply.
CLK13
2
O
Buffered clock output.
CLKOUT 3
3
O
Buffered clock output. Internal fe ed back on this pin.
GND
4
P
Ground.
REF_IN2
5
I
Input reference frequency. Spread spectrum modulation on this signal will be
passed to the output (up to 33kHz SST modulation).
CLK23
6
O
Buffered clock output.
CLK33
7
O
Buffered clock output.
NC
8
-
No connection.
Notes: 2: Weak pull-down. 3: Weak pull -down on all outputs.



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