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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT25SL321 데이터시트(PDF) 29 Page - Dialog Semiconductor |
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AT25SL321 데이터시트(HTML) 29 Page - Dialog Semiconductor |
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29 / 82 page  28 AT25SL321 DS-25SL321–112H–2020-10 If the Mode bits (M7-0) equal “Ax” hex, then the next Fast Dual I/O instruction (after CS is raised and then lowered) does not require the instruction (BBh) code, as shown in Figure 8-16 and Figure 8-17. This reduces the instruction sequence by eight clocks and allows the address to be immediately entered after CS is asserted low. If Mode bits (M7-0) are any value other “Ax” hex, the next instruction (after CS is raised and then lowered) requires the first byte instruction code, thus returning to normal operation. A Mode Bit Reset can be used to reset Mode Bits (M7-0) before issuing normal instructions. Figure 8-16. Fast Read Dual I/O Instruction (initial instruction or previous M7-0 ≠ Axh) Figure 8-17. Fast Read Dual I/O Instruction (previous M7-0 = Axh) |
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