8442AYI

www.icst.com/products/hiperclocks.html

REV. C MAY 10, 2005

10

Integrated

Circuit

Systems, Inc.

ICS8442I

The schematic of the ICS8442I layout example used in this lay-

out guideline is shown in

Figure 5A. The ICS8442I recommended

PCB board layout for this example is shown in

Figure 5B. This

layout example is used as a general guideline. The layout in the

actual system will depend on the selected component types, the

density of the components, the density of the traces, and the

stack up of the P.C. board.

+

-

VDDA

C14

0.1u

C2

VDD

C16

10u

Zo = 50 Ohm

U1

ICS8442

1

2

3

4

5

6

7

8

17

18

19

20

21

22

23

24

M5

M6

M7

M8

N0

N1

nc

GND

MR

S_CLOCK

S_DATA

S_LOAD

VDDA

nXTAL_SEL

T_CLK

X_OUT

C15

0.1u

Zo = 50 Ohm

+

-

C1

R7

10

Zo = 50 Ohm

Zo = 50 Ohm

C11

0.01u

R1

100

X1

R2

100