PCIMX6DP5AVT2AB datasheet(121/168 Pages) NXP

121 / 168 page

Electrical Characteristics

i.MX 6DualPlus/6QuadPlus Applications Processors Consumer Products, Rev. 3, 11/2018

NXP Semiconductors

121

4.12.15.1 PCIE_REXT Reference Resistor Connection

The impedance calibration process requires connection of reference resistor 200

Ω. 1% precision resistor

on PCIE_REXT pads to ground. It is used for termination impedance calibration.

4.12.16 Pulse Width Modulator (PWM) Timing Parameters

This section describes the electrical information of the PWM. The PWM can be programmed to select one

of three clock signals as its source frequency. The selected clock signal is passed through a prescaler before

being input to the counter. The output is available at the pulse-width modulator output (PWMO) external

pin.

Figure 83 depicts the timing of the PWM, and Table 76 lists the PWM timing parameters.

Figure 83. PWM Timing

4.12.17 SATA PHY Parameters

This section describes SATA PHY electrical specifications.

4.12.17.1 Transmitter and Receiver Characteristics

The SATA PHY meets or exceeds the electrical compliance requirements defined in the SATA

specifications.

NOTE

The tables in the following sections indicate any exceptions to the SATA

specification or aspects of the SATA PHY that exceed the standard, as well

as provide information about parameters not defined in the standard.

The following subsections provide values obtained from a combination of simulations and silicon

characterization.

Table 76. PWM Output Timing Parameters

Parameter

Min

Max

Unit

—

PWM Module Clock Frequency

ipg_clk

MHz

PWM output pulse width high

—

PWM output pulse width low

—

PWMn_OUT

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