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MCIMX6DP4AVT2AB 데이터시트(PDF) 54 Page - NXP Semiconductors |
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MCIMX6DP4AVT2AB 데이터시트(HTML) 54 Page - NXP Semiconductors |
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54 / 168 page ![]() i.MX 6DualPlus/6QuadPlus Applications Processors Consumer Products, Rev. 3, 11/2018 54 NXP Semiconductors Electrical Characteristics 4.9.3 External Interface Module (EIM) The following subsections provide information on the EIM. Maximum operating frequency for EIM data transfer is 104 MHz. Timing parameters in this section that are given as a function of register settings or clock periods are valid for the entire range of allowed frequencies (0–104 MHz). 4.9.3.1 EIM Interface Pads Allocation EIM supports 32-bit, 16-bit and 8-bit devices operating in address/data separate or multiplexed modes. Table 40 provides EIM interface pads allocation in different modes. Table 40. EIM Internal Module Multiplexing1 1 For more information on configuration ports mentioned in this table, see the i.MX 6DualPlus/6QuadPlus reference manual (IMX6DQPRM). Setup Non Multiplexed Address/Data Mode Multiplexed Address/Data mode 8 Bit 16 Bit 32 Bit 16 Bit 32 Bit MUM = 0, DSZ = 100 MUM = 0, DSZ = 101 MUM = 0, DSZ = 110 MUM = 0, DSZ = 111 MUM = 0, DSZ = 001 MUM = 0, DSZ = 010 MUM = 0, DSZ = 011 MUM = 1, DSZ = 001 MUM = 1, DSZ = 011 EIM_ADDR [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_AD [15:00] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_ADDR [25:16] EIM_DATA [09:00] EIM_DATA [07:00], EIM_EB0_B EIM_DATA [07:00] ——— EIM_DATA [07:00] —EIM_DATA [07:00] EIM_AD [07:00] EIM_AD [07:00] EIM_DATA [15:08], EIM_EB1_B —EIM_DATA [15:08] —— EIM_DATA [15:08] —EIM_DATA [15:08] EIM_AD [15:08] EIM_AD [15:08] EIM_DATA [23:16], EIM_EB2_B —— EIM_DATA [23:16] —— EIM_DATA [23:16] EIM_DATA [23:16] —EIM_DATA [07:00] EIM_DATA [31:24], EIM_EB3_B —— — EIM_DATA [31:24] — EIM_DATA [31:24] EIM_DATA [31:24] —EIM_DATA [15:08] |
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