MCIMX6DP4AVT2AB datasheet(95/168 Pages) NXP

95 / 168 page

Electrical Characteristics

i.MX 6DualPlus/6QuadPlus Applications Processors Consumer Products, Rev. 3, 11/2018

NXP Semiconductors

4.12.10.1 IPU Sensor Interface Signal Mapping

The IPU supports a number of sensor input formats. Table 62 defines the mapping of the Sensor Interface

Pins used for various supported interface formats.

Table 62. Camera Input Signal Cross Reference, Format, and Bits Per Cycle

Signal

Name1

1 IPU2_CSIx stands for IPU2_CSI1 or IPU2_CSI2.

RGB565

8 bits

2 cycles

RGB5652

8 bits

3 cycles

RGB6663

8 bits

3 cycles

RGB888

8 bits

3 cycles

YCbCr4

8 bits

2 cycles

RGB5655

16 bits

1 cycle

YCbCr6

16 bits

1 cycle

YCbCr7

16 bits

1 cycle

YCbCr8

20 bits

1 cycle

IPUx_CSIx_

DATA00

———

—

C[0]

IPUx_CSIx_

DATA01

———

—

C[1]

IPUx_CSIx_

DATA02

—

C[0]

C[2]

IPUx_CSIx_

DATA03

—

C[1]

C[3]

IPUx_CSIx_

DATA04

—

B[0]

C[0]

C[2]

C[4]

IPU2_CSIx_

DATA_05

—

B[1]

C[1]

C[3]

C[5]

IPUx_CSIx_

DATA06

—

B[2]

C[2]

C[4]

C[6]

IPUx_CSIx_

DATA07

—

B[3]

C[3]

C[5]

C[7]

IPUx_CSIx_

DATA08

—

B[4]

C[4]

C[6]

C[8]

IPUx_CSIx_

DATA09

—

G[0]

C[5]

C[7]

C[9]

IPUx_CSIx_

DATA10

—

G[1]

C[6]

Y[0]

IPUx_CSIx_

DATA11

—

G[2]

C[7]

Y[1]

IPUx_CSIx_

DATA12

B[0], G[3]

R[2],G[4],B[2]

R/G/B[4]

R/G/B[0]

Y/C[0]

G[3]

Y[0]

Y[2]

IPUx_CSIx_

DATA13

B[1], G[4]

R[3],G[5],B[3]

R/G/B[5]

R/G/B[1]

Y/C[1]

G[4]

Y[1]

Y[3]

IPUx_CSIx_

DATA14

B[2], G[5]

R[4],G[0],B[4]

R/G/B[0]

R/G/B[2]

Y/C[2]

G[5]

Y[2]

Y[4]

IPUx_CSIx_

DATA15

B[3], R[0]

R[0],G[1],B[0]

R/G/B[1]

R/G/B[3]

Y/C[3]

R[0]

Y[3]

Y[5]

IPUx_CSIx_

DATA16

B[4], R[1]

R[1],G[2],B[1]

R/G/B[2]

R/G/B[4]

Y/C[4]

R[1]

Y[4]

Y[6]

IPUx_CSIx_

DATA17

G[0], R[2]

R[2],G[3],B[2]

R/G/B[3]

R/G/B[5]

Y/C[5]

R[2]

Y[5]

Y[7]

IPUx_CSIx_

DATA18

G[1], R[3]

R[3],G[4],B[3]

R/G/B[4]

R/G/B[6]

Y/C[6]

R[3]

Y[6]

Y[8]

IPUx_CSIx_

DATA19

G[2], R[4]

R[4],G[5],B[4]

R/G/B[5]

R/G/B[7]

Y/C[7]

R[4]

Y[7]

Y[9]

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