Data Sheet

ADP2165/ADP2166

Rev. B | Page 7 of 23

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

2

1

3

4

5

6

18

17

16

15

14

13

FB

COMP

SS

TRK

RT

SYNC

PGND

SW

SW

SW

SW

PVIN

ADP2165/

ADP2166

TOP VIEW

(Not to Scale)

NOTES

1. EXPOSED PAD. SOLDER THE EXPOSED

PAD TO AN EXTERNAL GROUND PLANE

UNDERNEATH THE IC FOR THERMAL

DISSIPATION.

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

SYNC

Synchronization Input. Connect this pin to an external clock between 250 kHz and 1.4 MHz to synchronize the

switching frequency to the external clock. RT can be used to program the phase shift when synchronizing the

external clock.

2

RT

Frequency Setting. Connect a resistor between the RT and GND pins to program the switching frequency between

250 kHz to 1.4 MHz. When the RT pin is floating, the frequency is set to 620 kHz, and when the RT pin is connected

to VREG, the frequency is set to 1.2 MHz.

3

TRK

Tracking Input. This pin can be used for tracking and sequencing. If the tracking function is not used, connect TRK

to VREG.

4

SS

Soft Start Control. Connect a capacitor from the SS pin to the GND pin to program the soft start time.

5

COMP

Error Amplifier Output. Connect a compensation network from the COMP pin to the GND pin.

6

FB

7

GND

Analog Ground. Connect to the ground plane.

8

PGOOD

Power-Good Output (Open-Drain). A pull-up resistor of 100 kΩ is recommended.

9

BST

Supply Rail for the High-Side MOSFET Gate Drive. Place a 0.1 µF capacitor between the SW pin and the BST pin.

10, 11,

12, 13

PGND

Power Ground. Connect this pin to the ground plane and to the output return side of the output capacitor.

14, 15,

16, 17

SW

Switching Node.

18, 19,

20, 21

PVIN

Power Input. Connect this pin to the input power source and connect a bypass capacitor between this pin and

ground.

22

AVIN

Bias Voltage Input Pin. Connect a bypass capacitor between this pin and GND and a small (10 Ω) resistor between

this pin and PVIN.

23

EN

Precision Enable Input Pin. An external resistor divider can be used to set the turn-on threshold. To enable the

device automatically, connect the EN pin to PVIN. This pin has a 1 MΩ pull-down resistor to GND.

24

VREG

Internal Bias Regulator Output. It supplies the regulated voltage to the internal circuitry. Bypass the VREG pin to

the GND pin with a high quality, low ESR 1 µF ceramic capacitor.

EPAD

Exposed Pad. Solder the exposed pad to an external ground plane underneath the IC for thermal dissipation.