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ADP2165ACPZ-1.2-R7 데이터시트(PDF) 16 Page - Analog Devices

부품명 ADP2165ACPZ-1.2-R7
상세설명  5.5 V, 5 A/6 A, High Efficiency, Step-Down DC-to-DC Regulators with Output Tracking
PDF  23 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADP2165ACPZ-1.2-R7 데이터시트(HTML) 16 Page - Analog Devices

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ADP2165/ADP2166
Data Sheet
Rev. B | Page 16 of 23
The ESR and the value of the capacitance determine the output
ripple. Use the following equation to select a capacitor that can
meet the output ripple requirements:
COUT_RIPPLE =
RIPPLE
OUT
SW
L
V
f
I
_
8
×
×
RESR =
L
RIPPLE
OUT
I
V
_
where:
ΔVOUT_RIPPLE is the allowable output ripple voltage.
RESR is the equivalent series resistance of the output capacitor
in ohms (Ω).
Select the largest output capacitance given by COUT_UV, COUT_OV,
and COUT_RIPPLE to meet both the load transient and the output
ripple performance.
The selected output capacitor voltage rating must be greater
than the output voltage. The rms current rating of the output
capacitor must be larger than the value calculated by
12
L
C
I
I
OUT_RMS
=
COMPENSATION DESIGN
For peak current mode control, the power stage can be simplified
as a voltage controlled current source supplying current to the
output capacitor and load resistor. It is composed of one domain
pole and a zero that is contributed by the output capacitor ESR.
The control to output transfer function is based on the following:
GVD (S) =
)
(
)
(
s
V
s
V
COMP
OUT
= AVI × R ×
P
Z
f
s
f
s
×
π
×
+
×
π
×
+
2
1
2
1
fZ =
OUT
ESR
C
R
×
×
π
×
2
1
fP =
OUT
ESR
C
R
R
×
+
×
π
×
)
(
2
1
where:
AVI = 10 A/V.
R is the load resistance.
COUT is the output capacitance.
RESR is the equivalent series resistance of the output capacitor.
The ADP2165/ADP2166 use a transconductance amplifier for the
error amplifier, which compensates for the system loop. Figure 30
shows the simplified, peak current mode control, small signal circuit.
RESR
R
+
g
m
RC
CCP
COUT
CC
RTOP
RBOT
+
AVI
VOUT
VCOMP
VOUT
Figure 30. Simplified Peak Current Mode Control, Small Signal Circuit
The compensation components, RC and CC, contribute a zero,
and the optional CCP and RC contribute an optional pole.
The loop gain transfer equation is as follows:
TV (S) =
×
+
×
+
CP
C
m
TOP
BOT
BOT
C
C
g
R
R
R
1
()
(1
)
CC
VD
CCCP
C
CP
RC
s
Gs
RC
C
ss
CC
+
××
×
××
×+
×
+
The following design guideline shows how to select the RC, CC,
and CCP compensation components for the ceramic output
capacitor applications:
1. Determine the cross frequency, fC. Generally, fC is between
fSW/12 and fSW/6.
2. Calculate RC by using the following equation:
VI
m
C
OUT
OUT
C
A
g
f
C
V
R
×
×
×
×
×
π
×
V
6
.
0
2
=
3. Place the compensation zero at the domain pole, fP; then
determine CC by using the following equation:
C
OUT
ESR
C
R
C
R
R
C
×
+
=
)
(
4. CCP is optional. It can be used to cancel the zero caused by
the ESR of the output capacitor.
C
OUT
ESR
CP
R
C
R
C
×
=
The fixed output version IC must consider the feedforward
capacitance of feedback resistor (RTOP) to calculate CCP.
The total internal feedback resistance is 1 MΩ.
First, place the compensation pole at the minimum value
between the domain pole, fP, and
Z
P
FB
FB
f
f
×
.
)
1
1
(
1
BOT
TOP
F
FB
R
R
C
f
P
+
×
×
=
F
TOP
FB
C
R
f
Z
×
×
=
1
Then, determine CCP by
(
)
(
)
Z
P
Z
P
FB
FB
P
C
C
C
FB
FB
P
C
CP
f
f
f
min
C
C
R
f
f
f
min
C
C
×
×
×
×
×
=
,
,
where CF = 8.14 pF.



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