ADP5003ACPZ-R7 datasheet(16/31 Pages) AD

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ADP5003

Data Sheet

Rev. A | Page 16 of 31

The emulated inductor current scheme senses the current in the

inductor during the off phase of the cycle, when the NFET is

conducting, and uses this inductor current to generate the

emulated current sense signal during the on time of the cycle.

This scheme allows the low duty cycles necessary for high input

voltage, VIN, to output voltage, VOUT, conversion ratios.

Oscillator Frequency Control

The ADP5003 buck regulator oscillator frequency is controlled

by using the RT pin or the SYNC pin. To define the buck

regulator internal switching frequency, connect the RT pin via a

resistor to AGND1. Figure 38 shows the relationship of the buck

oscillator frequency and the RT resistor value.

0.5

1.0

1.5

2.0

2.5

3.0

10k

100k

RT RESIST

OR (Ω)

Figure 38. Buck Oscillator Frequency vs. RT Resistor (RRT)

To determine the oscillator frequency (fSW), use the following

equation:

fSW = (1.78 × 1011)/RRT

(1)

An upper limit prevents out of range frequencies when the RT

pin is shorted to ground or connected with a resistor value less

than 70 kΩ.

External Oscillator Synchronization

The SYNC pin is dedicated for oscillator synchronization and

allows the ADP5003 to lock to an external clock.

When an applied external clock signal is present at the SYNC pin,

the buck regulator operates in sync with this signal.

When alternating between external clocks and the internal

oscillator, the presence of an external frequency causes a

multiplexer to switch between the internal oscillator and the

external SYNC frequency. The output of this multiplexer acts as

the frequency reference to an internal phase-locked loop (PLL),

which ensures that changing between the two modes of operation

results in a smooth transition between the different frequencies.

Buck Startup

The buck regulator turns on with a controlled soft start ramp to

limit inrush current. The reference of the buck is ramped

during tSSBUCK, which is typically 2 ms (see Figure 39).

A CH2

1.20V

CH1 1.00A

CH2 5.0V

4.00µs

1.60ms

CH3 5.00V

CH4 1.0V

VEN1

VPVOUT1

tSSBUCK

ILOAD1

VSW1

Figure 39. Buck Startup

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