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AS3911 데이터시트(PDF) 16 Page - ams AG

부품명 AS3911
상세설명  NFC Initiator / HF Reader IC
PDF  159 Pages
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제조업체  AMSCO [ams AG]
홈페이지  http://www.ams.com
Logo AMSCO - ams AG

AS3911 데이터시트(HTML) 16 Page - ams AG

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Page 16
ams Datasheet
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[v2-11] 2016-Jun-13
AS3911 − Detailed Description
One regulator is for the analog blocks, one for digital blocks,
there is also a separate one for the antenna drivers. In case of
low cost applications some (or all) regulators may not be used
to save on external components.
This block additionally generates a reference voltage for the
analog processing (AGD - analog ground). This voltage also has
an associated external buffer capacitor.
POR and Bias
This block contains the bias current and voltage generator
which provides bias currents and reference voltages to all other
blocks. It also incorporates a Power on Reset (POR) circuit which
provides a reset at power-up and at low supply levels.
RC Oscillator and Wake-up Timer
The AS3911 includes several possibilities of low power
detection of a card presence (capacitive sensor, phase
measurement, amplitude measurement). RC oscillator and
register configurable Wake-up timer are used to schedule
periodic detection. When presence of a card is detected an
interrupt is sent to controller.
ISO14443 and NFCIP-1 Framing
This block performs framing for receive and transmit according
to the selected ISO mode and bit rate settings.
In reception it takes demodulated sub-carrier signal from
Receiver. It recognizes the SOF, EOF and data bits, performs
parity and CRC check, organizes the received data in bytes and
places them in the FIFO.
During transmit, it operates inversely, it takes bytes from FIFO,
generates parity and CRC bits, adds SOF and EOF and performs
final encoding before passing modulation signal to transmitter.
In Transparent mode, the framing and FIFO are bypassed, the
digitized sub-carrier signal, which is Receiver output, is directly
sent to MISO pin, signal applied to MOSI pin is directly used to
modulate the transmitter.
FIFO
The AS3911 contains a 96 byte FIFO. Depending on the mode,
it contains either data which has been received or data which
is to be transmitted.
Control Logic
The control logic contains I/O registers which define operation
of device.



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