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Functional Description

3.5.3 Clock Generator

The clock generator produces quadrature clock signals of 2.4 GHz for both the receiver and the transmitter. All

components of the clock generator are integrated into the chip, including inductors, varactors, filters, regulators

and dividers.

The clock generator has built-in calibration and self-test circuits. Quadrature clock phases and phase noise are

optimized on chip with patented calibration algorithms which ensure the best performance of the receiver and the

transmitter.

3.5.4 Wi­Fi Radio and Baseband

The ESP32-C3 family Wi-Fi radio and baseband support the following features:

• 802.11b/g/n

• 802.11n MCS0-7 that supports 20 MHz and 40 MHz bandwidth

• 802.11n MCS32

• 802.11n 0.4 µs guard interval

• data rate up to 150 Mbps

• RX STBC (single spatial stream)

• adjustable transmitting power

• antenna diversity

ESP32-C3 family supports antenna diversity with an external RF switch. This switch is controlled by one or

more GPIOs, and used to select the best antenna to minimize the effects of channel imperfections.

3.5.5 Wi­Fi MAC

ESP32-C3 family implements the full 802.11 b/g/n Wi-Fi MAC protocol. It supports the Basic Service Set (BSS)

STA and SoftAP operations under the Distributed Control Function (DCF). Power management is handled

automatically with minimal host interaction to minimize the active duty period.

The ESP32-C3 family Wi-Fi MAC applies the following low-level protocol functions automatically:

• 4 × virtual Wi-Fi interfaces

• infrastructure BSS in Station mode, SoftAP mode, Station + SoftAP mode, and promiscuous mode

• RTS protection, CTS protection, Immediate Block ACK

• fragmentation and defragmentation

• TX/RX A-MPDU, TX/RX A-MSDU

• transmit opportunity (TXOP)

• Wi-Fi multimedia (WMM)

• GCMP, CCMP, TKIP, WAPI, WEP, BIP, WPA2-PSK/WPA2-Enterprise, and WPA3-PSK/WPA3-Enterprise

• automatic beacon monitoring (hardware TSF)

• 802.11mc FTM

Espressif Systems

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ESP32-C3 Family Datasheet V0.6