2

Pin Definition

VDDA,

VDD3P3,

VDD3P3_RTC,

VDD3P3_CPU

CHIP_PU

t0

t1

V

IL_nRST

2.8 V

Figure 5: ESP32­C3 Family Power­up and Reset Timing

Table 3: Description of ESP32­C3 Family Power­up and Reset Timing Parameters

Min

Parameter

Description

(µs)

Time between bringing up the VDDA, VDD3P3, VDD3P3_RTC, and

VDD3P3_CPU rails, and activating CHIP_PU

50

Table 11) to reset the chip

50

2.4 Strapping Pins

ESP32-C3 family has three strapping pins:

• GPIO8

• GPIO9

• GPIO10

Software can read the values of corresponding bits from the register ”GPIO_STRAPPING”.

During the chip’s system reset, the latches of the strapping pins sample the voltage level as strapping bits of ”0”

or ”1”, and hold these bits until the chip is powered down or shut down.

Types of system reset include:

• power-on-reset

• RTC watchdog reset

• brownout reset

• analog super watchdog reset

• crystal clock glitch detection reset

By default GPIO9 is connected to the chip’s internal pull-up. Consequently, if GPIO9 is unconnected or the

connected external circuit is high-impedance, the internal weak pull-up/pull-down will determine its default input

level.

To change the strapping bit values, you can apply the external pull-down/pull-up resistances, or use the host

MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-C3 family.

After reset, the strapping pins work as normal-function pins.

Espressif Systems

12

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ESP32-C3 Family Datasheet V0.6