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PCF85363ATL/A 데이터시트(PDF) 5 Page - NXP Semiconductors |
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PCF85363ATL/A 데이터시트(HTML) 5 Page - NXP Semiconductors |
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5 / 86 page ![]() NXP Semiconductors PCF85363A Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input, and I2C-bus 6.2 Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified. Description Symbol PCF85363ATL (DFN2626-10) PCF85363ATT (TSSOP8) PCF85363ATT1 (TSSOP10) Type Primary use Secondary use OSCI 1 1 1 input oscillator input - OSCO 2 2 2 output oscillator output - VBAT 3 3 3 supply battery backup supply voltage [1] - can be configured with TSPM[1:0] [2] TS (CLK/INTB) 4 - 4 input/ output timestamp input INTB and CLK output (push- pull); stop-watch control VSS 5 [3] 4 5 supply ground supply voltage - SDA 6 5 6 input/ output serial data line - SCL 7 6 7 input serial clock input - CLK 8 - 8 output CLK (push-pull) - can be configured with INTAPM[1:0] [2] INTA (CLK) 9 7 9 output interrupt output (open-drain) CLK output (open-drain) VDD 10 8 10 supply supply voltage - Table 3. Pin description [1] Connect to VDD if not used. [2] See Table 6 and Table 46. [3] The die paddle (exposed pad) is connected to VSS through high ohmic (non-conductive) silicon attach and should be electrically isolated. It is good engineering practice to solder the exposed pad to an electrically isolated PCB copper pad as shown in Figure 43 for better heat transfer but it is not required as the RTC doesn’t consume much power. In no case should traces be run under the package exposed pad. 7 Functional description The PCF85363A contains 8-bit registers for time information, for timestamp information and registers for system configuration. Included is an auto-incrementing register address, an on-chip 32.768 kHz oscillator with integrated capacitors, a frequency divider which provides the source clock for the Real-Time Clock (RTC) and calender, and an I2C-bus interface with a maximum data rate of 400 kbit/s. The built-in address register will increment automatically after each read or write of a data byte. After register 2Fh, the auto-incrementing will wrap around to address 00h. When the RAM is accessed, the wrap around will happen after address 7Fh, (see Figure 5). address register 00h auto-increment wrap around 01h 02h 03h ... 2Dh 2Eh 2Fh address register 40h auto-increment wrap around 41h 42h 43h ... 7Dh 7Eh 7Fh Time and configuration registers RAM registers aaa-011066 Figure 5. Address register incrementing PCF85363A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.1 — 18 June 2021 5 / 86 |
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