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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADIN2111CCPZ-R7 데이터시트(PDF) 75 Page - Analog Devices |
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ADIN2111CCPZ-R7 데이터시트(HTML) 75 Page - Analog Devices |
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75 / 125 page  Data Sheet ADIN2111 REGISTERS analog.com Rev. 0 | 75 of 125 Table 104. Bit Descriptions for P1_TX_BCAST_CNT Bits Bit Name Description Reset Access [31:0] P1_TX_BCAST_CNT Tx Broadcast Frame Count. 0x0 R P1 Tx Multicast Frame Count Register Address: 0xAA, Reset: 0x00000000, Name: P1_TX_MCAST_CNT Table 105. Bit Descriptions for P1_TX_MCAST_CNT Bits Bit Name Description Reset Access [31:0] P1_TX_MCAST_CNT Tx Multicast Frame Count. 0x0 R P1 Tx Unicast Frame Count Register Address: 0xAB, Reset: 0x00000000, Name: P1_TX_UCAST_CNT Table 106. Bit Descriptions for P1_TX_UCAST_CNT Bits Bit Name Description Reset Access [31:0] P1_TX_UCAST_CNT Tx Unicast Frame Count. 0x0 R P1 Rx Frames Dropped Due to FIFO Full Register Address: 0xAC, Reset: 0x00000000, Name: P1_RX_DROP_FULL_CNT Table 107. Bit Descriptions for P1_RX_DROP_FULL_CNT Bits Bit Name Description Reset Access [31:0] P1_RX_DROP_FULL_CNT Rx Frames Dropped Due to FIFO Full. Note that on LES, if a received frame is destined for both the host and other port (a flooded frame), and the frame is not forwarded to one of the destination FIFOs because it is full, the frame is not counted as a dropped frame.That is, if the frame is flooded, P1_RX_DROP_FULL_CNT only increments if both FIFOs are full. 0x0 R P1 Rx Frames Dropped Due to Filtering Register Address: 0xAD, Reset: 0x00000000, Name: P1_RX_DROP_FILT_CNT Table 108. Bit Descriptions for P1_RX_DROP_FILT_CNT Bits Bit Name Description Reset Access [31:0] P1_RX_DROP_FILT_CNT Rx Frames Dropped Due to Filtering. 0x0 R Frame Received on Port 1 with IFG Errors Register Address: 0xAE, Reset: 0x00000000, Name: P1_RX_IFG_ERR_CNT Table 109. Bit Descriptions for P1_RX_IFG_ERR_CNT Bits Bit Name Description Reset Access [31:0] P1_RX_IFG_ERR_CNT IFG Error Counter for Port 1 Received Frames. 0x0 R P1 Transmit Interframe Gap Register Address: 0xB0, Reset: 0x0000000B, Name: P1_TX_IFG |
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