AD9540PCB datasheet(7/32 Pages) AD

7 / 32 page

AD9540

Rev. 0 | Page 7 of 32

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

I/O Update to SYNC_CLK Setup Time

PS<2:0> to SYNC_CLK Setup Time

Latencies/Pipeline Delays

I/O Update to DAC Frequency Change

SYSCLK Cycles

I/O Update to DAC Phase Change

SYSCLK Cycles

PS<2:0> to DAC Frequency Change

SYSCLK Cycles

PS<2:0> to DAC Phase Change

SYSCLK Cycles

I/O Update to CP_OUT Scaler Change

SYSCLK Cycles

I/O Update to Frequency Accumulator

Step Size Change

SYSCLK Cycles

DAC OUTPUT CHARACTERISTICS

Resolution

Bits

Full-Scale Output Current

Gain Error

−10

+10

% FS

Output Offset

0.6

µA

Output Capacitance

Voltage Compliance Range

AVDD − 0.50

AVDD + 0.50

Wideband SFDR (DC to Nyquist)

10 MHz Analog Out

dBc

40 MHz Analog Out

dBc

80 MHz Analog Out

dBc

120 MHz Analog Out

dBc

160 MHz Analog Out

dBc

Narrow-Band SFDR

10 MHz Analog Out (±1 MHz)

dBc

10 MHz Analog Out (±250 kHz)

dBc

10 MHz Analog Out (±50 kHz)

dBc

40 MHz Analog Out (±1 MHz)

dBc

40 MHz Analog Out (±250 kHz)

dBc

40 MHz Analog Out (±50 kHz)

dBc

80 MHz Analog Out (±1 MHz)

dBc

80 MHz Analog Out (±250 kHz)

dBc

80 MHz Analog Out (±50 kHz)

dBc

120 MHz Analog Out (±1 MHz)

dBc

120 MHz Analog Out (±250 kHz)

dBc

120 MHz Analog Out (±50 kHz)

dBc

160 MHz Analog Out (±1 MHz)

dBc

160 MHz Analog Out (±250 kHz)

dBc

160 MHz Analog Out (±50 kHz)

dBc

DAC RESIDUAL PHASE NOISE

19.7 MHz FOUT

@ 10 Hz Offset

122

dBc/Hz

@ 100 Hz Offset

134

dBc/Hz

@ 1 kHz Offset

143

dBc/Hz

@ 10 kHz Offset

150

dBc/Hz

@ 100 kHz Offset

158

dBc/Hz

>1 MHz Offset

160

dBc/Hz

AD9540PCB 데이터시트(PDF) 7 Page - Analog Devices

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