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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F469AE 데이터시트(PDF) 161 Page - STMicroelectronics |
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STM32F469AE 데이터시트(HTML) 161 Page - STMicroelectronics |
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161 / 220 page  DS11189 Rev 7 161/220 STM32F469xx Electrical characteristics 191 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 56 or Figure 57, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 56. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176 and TFBGA216. VREF+ is also available on LQFP100, LQFP144, LQFP176 and LQFP208. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. Figure 57. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176 and TFBGA216. VREF+ is also available on LQFP100, LQFP144, LQFP176 and LQFP208. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. MS38278V1 STM32F 1 μF // 10 nF 1 μF // 10 nF VREF+ (1) VSSA/VREF+ (1) VDDA MS38279V1 STM32F 1 μF // 10 nF VREF+/VDDA (1) VREF-/VDDA (1) |
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