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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F732IE 데이터시트(PDF) 138 Page - STMicroelectronics |
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STM32F732IE 데이터시트(HTML) 138 Page - STMicroelectronics |
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138 / 226 page  Electrical characteristics STM32F732xx STM32F733xx 138/226 DS11854 Rev 6 Figure 41 and Figure 42 show the main PLL output clock waveforms in center spread and down spread modes, where: • F0 is fPLL_OUT nominal. • Tmode is the modulation period. • md is the modulation depth. Figure 41. PLL output clock waveforms in center spread mode Figure 42. PLL output clock waveforms in down spread mode 6.3.13 USB OTG HS PHY PLLs characteristics (on STM32F733xx devices) The parameters given in Table 48 are derived from tests performed under temperature and VDD supply voltage conditions summarized in Table 16. Frequency (PLL_OUT) Time F0 tmode 2xtmode md ai17291 md Frequency (PLL_OUT) Time F0 tmode 2xtmode 2xmd ai17292b Table 48. USB OTG HS PLL1 characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fPLL1_IN PLL1 input clock - 12, 12.5, 16, 24, 25 MHz fPLL1_OUT PLL1 output clock(2) -- 60 - fVCO_OUT PLL1 VCO output - 600 - 720 tLOCK PLL1 lock time(2) -- - 22 µs IDD(PLL1) PLL1 digital power consumption - - - 1.8 mA IDDA(PLL1) PLL1 analog power consumption - - - 2.75 |
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