STM32G0 datasheet(60/135 Pages) STMICROELECTRONICS

60 / 135 page

Electrical characteristics

STM32G071x8/xB

60/135

DS12232 Rev 4

Table 25. Current consumption in Run and Low-power run modes

at different die temperatures

Symbol

Parameter

Conditions

Typ

Max(1)

Unit

General

fHCLK

Fetch

from(2)

°C

125

°C

130

°C

IDD(Run)

Supply

current in

Run mode

Range 1;

PLL enabled;

fHCLK = fHSE_bypass

(≤16 MHz),

fHCLK = fPLLRCLK

(>16 MHz);

(3)

64 MHz

Flash

memory

6.3

6.4

6.8

6.7

7.0

7.7

56 MHz

5.5

5.7

5.9

6.3

6.8

48 MHz

5.0

5.1

5.4

5.2

5.7

6.3

32 MHz

3.5

3.6

3.8

4.0

4.3

4.7

24 MHz

2.8

2.9

3.1

3.6

4.0

16 MHz

1.8

1.9

2.1

2.5

3.0

64 MHz

SRAM

6.0

6.2

6.4

6.3

6.6

7.0

56 MHz

5.3

5.5

5.7

5.6

5.8

6.2

48 MHz

4.7

4.8

5.0

5.2

5.6

32 MHz

3.3

3.4

3.5

3.8

4.1

24 MHz

2.6

2.7

2.9

2.8

3.1

3.4

16 MHz

1.7

1.9

2.1

2.7

Range 2;

PLL enabled;

fHCLK = fHSE_bypass

(≤16 MHz),

fHCLK = fPLLRCLK

(>16 MHz);

(3)

16 MHz

Flash

memory

1.4

1.5

1.7

2.0

2.6

8 MHz

0.8

0.9

1.0

1.2

1.3

1.8

2 MHz

0.3

0.5

0.8

1.4

16 MHz

SRAM

1.4

1.6

1.8

2.2

8 MHz

0.7

0.8

1.0

1.1

1.2

1.6

4 MHz

0.4

0.5

0.6

0.7

0.9

1.5

2 MHz

0.3

0.5

0.8

1.2

IDD(LPRun)

Supply

current in

Low-power

run mode

PLL disabled;

fHCLK = fHSE

bypass (> 32 kHz),

fHCLK = fLSE

bypass (= 32 kHz);

(3)

2 MHz

Flash

memory

220

255

420

530

795 1255

µA

1 MHz

105

155

320

505

770 1200

500 kHz

105

265

465

700

1110

125 kHz

230

450

520 1045

32 kHz

220

375

475 1035

2 MHz

SRAM

199

231

380

485

700 1220

1 MHz

140

290

430

660

1140

500 kHz

240

365

625

1100

125 kHz

225

335

440

970

32 kHz

220

325

355

940

1. Based on characterization results, not tested in production.

2. Prefetch and cache enabled when fetching from Flash memory. Code compiled with high optimization for space in SRAM.

3. VDD = 3.0 V for values in Typ columns and 3.6 V for values in Max columns, all peripherals disabled.

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