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STM32G0 데이터시트(PDF) 30 Page - STMicroelectronics

부품명 STM32G0
상세설명  Arm® Cortex®-M0 32-bit MCU, up to 128 KB Flash, 36 KB RAM, 4x USART, timers, ADC, DAC, comm. I/Fs, 1.7-3.6V
PDF  135 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G0 데이터시트(HTML) 30 Page - STMicroelectronics

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Functional overview
STM32G071x8/xB
30/135
DS12232 Rev 4
Features of LPTIM1 and LPTIM2:
•
16-bit up counter with 16-bit autoreload register
•
16-bit compare register
•
Configurable output (pulse, PWM)
•
Continuous/one-shot mode
•
Selectable software/hardware input trigger
•
Selectable clock source:
–
Internal: LSE, LSI, HSI16 or APB clocks
–
External: over LPTIM input (working even with no internal clock source running,
used by pulse counter application)
•
Programmable digital glitch filter
•
Encoder mode
3.18.5
Independent watchdog (IWDG)
The independent watchdog is based on an 8-bit prescaler and 12-bit downcounter with
user-defined refresh window. It is clocked from an independent 32 kHz internal RC (LSI).
Independent of the main clock, it can operate in Stop and Standby modes. It can be used
either as a watchdog to reset the device when a problem occurs, or as a free-running timer
for application timeout management. It is hardware- or software-configurable through the
option bytes. Its counter can be frozen in debug mode.
3.18.6
System window watchdog (WWDG)
The window watchdog is based on a 7-bit downcounter that can be set as free-running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked by the
system clock. It has an early-warning interrupt capability. Its counter can be frozen in debug
mode.
3.18.7
SysTick timer
This timer is dedicated to real-time operating systems, but it can also be used as a standard
down counter.
Features of SysTick timer:
•
24-bit down counter
•
Autoreload capability
•
Maskable system interrupt generation when the counter reaches 0
•
Programmable clock source
3.19
Real-time clock (RTC), tamper (TAMP) and backup registers
The device embeds an RTC and five 32-bit backup registers, located in the RTC domain of
the silicon die.
The ways of powering the RTC domain are described in Section 3.7.6.
The RTC is an independent BCD timer/counter.



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