SPC58ECX datasheet(9/153 Pages) STMICROELECTRONICS

9 / 153 page

DS11620 Rev 8

9/153

SPC584Cx, SPC58ECx

Description

Figure 1. Block diagram

Instruction

32 ADD

64 DATA

Load / Store

32 ADD

64 DATA

FLASH

4 MB

EEPROM

4x32 KB

Non Volatile Memory

Multiple RWW partitions

256 Page Line

EFPU2

VLE

Core Memory Protection Unit

(CMPU)

e200 z420n3 – 180 MHz

dual issue

Main Core_0

Nexus3p

BIU with E2E ECC

Decorated Storage Access

SWT_0 IAC

System Memory Protection Unit

Cross Bar Switch (XBAR) AMBA 2.0 v6 AHB – 64 bits

Unified

Backdoor

Interface

With

E2E ECC

Periph.

Bridge 2

E2E ECC

Peripheral

Cluster 2

32 ADD

64 DATA

32 ADD

32 DATA

Periph.

Bridge 1

E2E ECC

Peripheral

Cluster 1

32 ADD

64 DATA

32 ADD

32 DATA

PRAMC_3

with E2E

ECC

32 ADD

64 DATA

SRAM

Array 3

128 KB

32 ADD

64 DATA

PRAMC_2

with E2E

ECC

32 ADD

64 DATA

SRAM

Array 2

256 KB

32 ADD

64 DATA

PFLASHC_1

Set-Associative Prefetch

Buffers

with E2E ECC

32 ADD

64 DATA

SPU

DCI

JTAGC

JTAGM

NPC

32 ADD

64 DATA

Nexus Data

Trace

Nexus Data

Trace

HSM

32 ADD

64 DATA

32 ADD

64 DATA

Concentrator_1

E2E ECC

PAMU

SWT_2 IAC

Instruction

32 ADD

64 DATA

Load / Store

32 ADD

64 DATA

e200 z420n3 – 180 MHz

dual issue

Main Core_2

Nexus3p

VLE

EFPU2

Unified

Backdoor

Interface

With

E2E ECC

Core Memory Protection Unit

(CMPU)

BIU with E2E ECC

Decorated Storage Access

INTC

I-Cache

Control

8 KB

2 way

D-MEM

Control

64 KB

D-MEM

D-Cache

Control

4 KB

2 way

I-Cache

Control

8 KB

2 way

D-MEM

Control

64 KB

D-MEM

D-Cache

Control

4 KB

2 way

Nexus Data

Trace

32 ADD

64 DATA

32 ADD

64 DATA

64 Ch

eDMA_1

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