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STM32F051X4 데이터시트(PDF) 36 Page - STMicroelectronics |
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STM32F051X4 데이터시트(HTML) 36 Page - STMicroelectronics |
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36 / 122 page ![]() Pinouts and pin descriptions STM32F051x4 STM32F051x6 STM32F051x8 36/122 DocID022265 Rev 7 58 D3 42 C4 29 29 PB6 I/O FTf - I2C1_SCL, USART1_TX, TIM16_CH1N, TSC_G5_IO3 - 59 C3 43 A4 30 30 PB7 I/O FTf - I2C1_SDA, USART1_RX, TIM17_CH1N, TSC_G5_IO4 - 60 B4 44 B4 31 31 BOOT0 I B - Boot memory selection 61 B3 45 - - 32 PB8 I/O FTf (4)(5) I2C1_SCL, CEC, TIM16_CH1, TSC_SYNC - 62 A3 46 - - - PB9 I/O FTf (5) I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT - 63 D5 47 D6 32 0 VSS S - - Ground 64 E5 48 A5 1 1 VDD S - - Digital power supply 1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output mode is limited: - The speed should not exceed 2 MHz with a maximum load of 30 pF. - These GPIOs must not be used as current sources (e.g. to drive an LED). 2. After the first RTC domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers which are not reset by the main reset. For details on how to manage these GPIOs, refer to the RTC domain and RTC register descriptions in the reference manual. 3. Distinct VSSA pin is only available on packages with 48 and more pins. For all other packages, the pin number corresponds to the VSS pin to which VSSA pad of the silicon die is connected. 4. On the LQFP32 package, PB2 and PB8 must be set to defined levels by software, as their corresponding pads on the silicon die are left unconnected. Apply the same recommendations as for unconnected pins. 5. On the WLCSP36 package, PB8, PB9, PB10, PB11, PB12, PB13, PB14 and PB15 must be set to defined levels by software, as their corresponding pads on the silicon die are left unconnected. Apply the same recommendations as for unconnected pins. 6. After reset, these pins are configured as SWDIO and SWCLK alternate functions, and the internal pull-up on the SWDIO pin and the internal pull-down on the SWCLK pin are activated. Table 13. Pin definitions (continued) Pin number Pin name (function upon reset) Pin functions Alternate functions Additional functions |
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