ST25R95 datasheet(46/61 Pages) STMICROELECTRONICS

46 / 61 page

6.4

SPI characteristics

The ST25R95 supports (CPOL = 0, CPHA = 0) and (CPOL = 1, CPHA = 1) modes.

Table 49. SPI interface characteristics

Symbol

Parameter

Condition

Min.

Max.

Unit

fSCK

1/ tc(SCK)

SPI clock frequency

2.0

MHz

VIL

Input low voltage

0.3 x VPS

VIH

Input high voltage

0.7 x VPS

VOL

Output low voltage

0.4 x VPS

VOH

Output high voltage

0.7 x VPS

tSU(NSS) (1)

NSS setup time

th(NSS) (1)

NSS hold time

tCH(SCKL) (1)

Clock low time

200

tCH(SCKH) (1) Clock high time

200

tSU(SI) (1)

Data slave Input setup time

th(SI) (1)

Data slave Input hold time

tv(SO) (1)

Data slave output valid time

th(SO) (1)

Data slave output hold time

After enable edge

Cb_SPI_IN

Capacitive load for input pins NSS, CLK, MOSI

Cb_SPI_OUT

Capacitive load for input pins MOSI

1. Values based on design simulation and/or characterization results, and not on tested in production.

Figure 12. SPI timing diagram (Slave mode and CPOL = 0, CPHA = 0)

NSS input

tSU(NSS)

tc(SCK)

th(NSS)

tV(SO)

th(SO)

tsu(SI)

th(SI)

CPOL = 0

CPHA = 0

tCH(SCKH)

tCH(SCKL)

MSB out

MSB in

Bit 6 out

Bit 1 in

LSB out

LSB in

MISO

MOSI

ST25R95

SPI characteristics

DS12807 - Rev 4

page 46/61

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