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ADE1202 데이터시트(PDF) 14 Page - Analog Devices

부품명 ADE1202
상세설명  Dual Channel, Configurable, Isolated Digital Input
PDF  42 Pages
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제조업체  AD [Analog Devices]
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ADE1202 데이터시트(HTML) 14 Page - Analog Devices

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ADE1202
Data Sheet
Rev. 0 | Page 14 of 42
–0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
–5
0
5
10
15
20
25
30
35
40
45
50
55
–1
012
3456
TIME (ms)
TA = 25°C
VDD = 3.3V
HIGH_CODE = 0xC8
LOW_CODE = 0x1E
HIGH_TIME = 0x12C
BIN_FILTER = 0x8096
PL_CTRL = 0
RISE_THR = 0x1E
PROGRAMMABLE
LOAD CURRENT
IN1
DOUT1
Figure 18. Typical Input, Digital Output, and Programmable Load Current Signals
(IN1, DOUT1, and Programmable Load Current on Channel 1) in Low Idle Mode
–1
0
1
2
3
4
5
6
7
8
9
0
50
100
150
200
TIME (ms)
TA =25°C
VDD =3.3V
HIGH_CODE = 0xFF
LOW_CODE = 0x1E
HIGH_TIME = 0xFFF
BIN_FILTER = 0x8096
PL_CTRL = 0
RISE_THR = 0x1E
LOAD2
IN1/IN2
LOAD1
GATE
Figure 19. Typical Input, Gate, LOAD1, and LOAD2 Signals when Both
External FETs Conducting (IN1 = IN2, Gate, LOAD1, LOAD2)
–1
0
1
2
3
4
5
6
7
8
9
0
50
100
150
200
TIME (ms)
TA =25°C
VDD =3.3V
HIGH_CODE = 0xFF
LOW_CODE = 0x1E
HIGH_TIME = 0xFFF
BIN_FILTER = 0x8096
PL_CTRL = 0
RISE_THR = 0x1E
LOAD2
IN1
LOAD1
GATE
Figure 20. Typical Input, Gate, LOAD1, and LOAD2 Signals when the External
FET on Channel 1 Conducting and Channel 2 Input Floating (IN1, Gate,
LOAD1, LOAD2)
0
1
2
3
4
5
6
7
8
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
ADDR PIN VOLTAGE (V)
MIN
INVALID
INPUT VOLTAGES
MAX
Figure 21. Decoded SPI Address (CHIP_ADDR) Value vs. ADDR Pin Voltage
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
–50
0
50
100
150
TEMPERATURE (°C)
VDD = 2.97V
PGA = 1
Figure 22. ADC Gain Error vs. Temperature



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