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ADM2461EBRWZ-R7 데이터시트(PDF) 9 Page - Analog Devices |
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ADM2461EBRWZ-R7 데이터시트(HTML) 9 Page - Analog Devices |
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9 / 21 page ![]() Data Sheet ADM2461E/ADM2463E Rev. 0 | Page 9 of 21 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1 1 GND1 2 RxD 3 4 VDD2 16 GND2 15 NIC 14 B 13 DE 5 A 12 TxD 6 NIC 11 INV NOTES 1. NIC = NOT INTERNALLY CONNECTED. 7 NIC 10 GND1 8 GND2 9 ADM2461E TOP VIEW (Not to Scale) RE Figure 10. ADM2461E Half-Duplex Pin Configuration Table 11. ADM2461E Pin Function Descriptions Pin No. Mnemonic Description 1 VDD1 1.7 V to 5.5 V Flexible Primary Side Power Supply. Connect a 0.1 μF decoupling capacitor between Pin 1 and Pin 2 to decouple the two supplies. An additional 10 μF decoupling capacitor can be connected between Pin 1 and Pin 2 to improve noise immunity in noisy environments. 2, 8 GND1 Ground 1, Logic Side. 3 RxD Receiver Output Data. When the INV pin is logic low, this output is high when A – B ≥ −30 mV and low when A – B ≤ –200 mV. When the INV pin is logic high, this output is high when A – B ≤ 30 mV and low when A – B ≥ 200 mV. When the RE pin is driven high, the receiver disables and this output is tristated. 4 RE Receiver Enable Input. This pin is an active low input. Drive this input low to enable the receiver. Drive this input high to disable the receiver. 5 DE Driver Output Enable. A high level on this pin enables the driver differential outputs, A and B. A low level on this pin places the outputs in a high impedance state. 6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input. When the INV pin is logic high, the data applied to this input is inverted. 7 INV Cable Invert Input. This pin is an active high input. Drive this pin high to invert the TxD signal applied and invert the A and B receiver inputs to correct for reversed cable installation. This pin is pulled internally to ground through a high impedance. If the cable invert function is not used, connect this pin to GND1. 9, 15 GND2 Isolated Ground 2 for the Integrated RS-485 Transceiver, Bus Side. 10, 11, 14 NIC Not Internally Connected. 12 A Driver Noninverting Output/Receiver Noninverting Input. 13 B Driver Inverting Output/Receiver Inverting Input. 16 VDD2 3.0 V to 5.5 V Isolated Side Power Supply. Connect a decoupling capacitor of 0.1 μF between Pin 16 and Pin 15 to decouple the two supplies. An additional 10 μF decoupling capacitor can be connected between Pin 16 and Pin 15 to improve noise immunity in noisy environments. |
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