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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LTM4686BEVPBF 데이터시트(PDF) 76 Page - Analog Devices |
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LTM4686BEVPBF 데이터시트(HTML) 76 Page - Analog Devices |
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76 / 130 page  LTM4686B 76 Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS Figure 36. Output Voltage Margining, Figure 62 Circuit, VOUT_COMMAND0 = 1.20V, VOUT_COMMAND1 = 2.50V (a) PMBus Operation (Reg. 0x01): 0x80 → 0xA8 (Margin High) (c) PMBus Operation (Reg. 0x01): 0x80 → 0x98 (Margin Low) (b) PMBus Operation (Reg. 0x01): 0xA8 → 0x80 (Margin Off) (d) PMBus Operation (Reg. 0x01): 0x98 → 0x80 (Margin Off) VOUT1 50mV/DIV VOUT0 50mV/DIV SCL 5V/DIV SDA 5V/DIV 4ms/DIV 4686B F36a VOUT1 50mV/DIV VOUT0 50mV/DIV SCL 5V/DIV SDA 5V/DIV 4ms/DIV 4686B F36b VOUT1 50mV/DIV VOUT0 50mV/DIV SCL 5V/DIV SDA 5V/DIV 4ms/DIV 4686B F36c VOUT1 50mV/DIV VOUT0 50mV/DIV SCL 5V/DIV SDA 5V/DIV 4ms/DIV 4686B F36d |
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