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LTM4686BEVPBF 데이터시트(PDF) 88 Page - Analog Devices

부품명 LTM4686BEVPBF
상세설명  Ultrathin Dual 14A or Single 28A 關Module Regulator with Digital Power System Management
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LTM4686B
88
Rev. 0
For more information www.analog.com
APPENDIX C: PMBUS COMMAND DETAILS
MFR_PWM_CONFIG
The MFR_PWM_CONFIG command sets the switching frequency phase offset with respect to the falling edge of the
SYNC signal. The part must be in the OFF state to process this command. Either the RUN pins must be low or the part
must be commanded off. If the part is in the RUN state and this command is written, the command will be ignored and
a BUSY fault will be asserted. Bit 7 allows remote differential voltage sensing for PolyPhase rail applications.
BIT
MEANING
7
EA Connection
0 – Independent EA and Channel Outputs
1 – EA1 uses EA0 input for PolyPhase operation
6
Reserved.
5
Reserved
4
Share Clock Enable : If this bit is 1, the
SHARE_CLK pin will not be released until
SVIN > VIN_ON. The SHARE_CLK pin will be
pulled low when SVIN < VIN_OFF. If this bit is 0, the SHARE_CLK
pin will not be pulled low when SVIN < VIN_OFF except for the
initial application of SVIN.
3
Reserved
BIT [2:0]
CHANNEL 0 (DEGREES)
CHANNEL 1 (DEGREES)
000b
0
180
001b
90
270
010b
0
240
011b
0
120
100b
120
240
101b
60
240
110b
120
300
Do not assert Bit [7] unless it is a PolyPhase application and both VOUT pins are tied together and both COMPna pins
are tied together.
This command has one data byte.
FREQUENCY_SWITCH
The FREQUENCY_SWITCH command sets the switching frequency, in kHz, of a PMBus device. See Table 7 for recom-
mended values.
Supported Frequencies:
VALUE [15:0]
RESULTING FREQUENCY (TYP)
0x0000
External Oscillator
0xFBE8
500kHz
0x023F
575kHz
0x028A
650kHz
0x02EE
750kHz
0x03E8
1000kHz



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