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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SWCS049G 데이터시트(PDF) 11 Page - Texas Instruments |
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SWCS049G 데이터시트(HTML) 11 Page - Texas Instruments |
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11 / 144 page  11 TPS65911 www.ti.com SWCS049S – JUNE 2010 – REVISED AUGUST 2018 Submit Documentation Feedback Product Folder Links: TPS65911 Pin Configuration and Functions Copyright © 2010–2018, Texas Instruments Incorporated Pin Attributes (continued) PIN I/O TYPE SUPPLIES DESCRIPTION PULLUP PULLDOWN NAME NO. PGOOD C4 O, OD Analog VCC7, GNDC VDDCtrl, internal signal, leave floating (controller trimming only) PWRDN N2 I Analog VRTC, DGND Reset input (for example, thermal reset) PWRHOLD N1 I Digital VRTC, DGND Switch-on, switch off control signal or GPI Programmable PD (default active) PWRON E4 I Digital VCC7, DGND External switch-on control (ON button) Programmable PU (default active) REFGND G7 I/O Analog REFGND Reference ground No SCL_SCK M4 I/O Digital VDDIO, DGND I2C bidirectional clock signal or serial peripheral interface clock input (multiplexed) External PU SDA_SDI M5 I/O Digital VDDIO, DGND I2C bidirectional data signal or serial peripheral interface data input (multiplexed) External PU SLEEP F1 I Digital VDDIO, DGND ACTIVE-SLEEP state transition control signal Programmable PD (default active) SW A4 I Analog VBST, GNDC VDDCtrl, Switch node SWIO K7, K8 O Power VCCIO, GNDIO VIO DCDC switched output No SW1 D1, D2, E2 O Power VCC1, GND1 VDD1 DCDC switched output No SW2 H1, H2 O Power VCC2, GND2 VDD2 DCDC switched output No TESTV B8 O Analog VCC7, AGND Analog test output (DFT) No TRAN C6 I Analog VCC7, GNDC Internal functional pin, leave floating (controller trimming only) TRIP B3 I Analog V5IN, GNDC VDDCtrl, OCL detection threshold pin VBACKUP D7 I Power VBACKUP, AGND Backup battery input No VBST A2 I Analog VBST, GNDC VDDCtrl, supply for high-side FET driver VCCIO L7, L8 I Power VCCIO, GNDIO VIO DCDC power Input No VCCS E8 I/O Analog VCC7, DGND Input for two comparators VCC1 E1, F2, F3 I Power VCC1, GND1 VDD1 DCDC power Input No VCC2 G1, G2 I Power VCC2, GND2 VDD2 DCDC power Input No VCC3 N3 I Power VCC3, AGND2 LDO6, LDO7, LDO8 power Input No VCC4 L1 I Power VCC4, AGND2 LDO5 power Input No VCC5 D8 I Power VCC5, AGND LDO3, LDO4 power Input No VCC6 N5 I Power VCC6, AGND2 LDO1, LDO2 power Input No VCC7 B6 I Power VCC7, REFGND VRTC power input and analog references supply No VDDIO N7 I Power VDDIO, DGND Digital Ios supply No VFB C5 I Analog VOUT, GNDC VDDCtrl, slew rate control capacitance VFBIO H8 I Analog VCC7, DGND VIO feedback voltage PD 5 µA VFB1 D4 I Analog VCC7, DGND VDD1 feedback voltage PD 5 µA VFB2 K2 I Analog VCC7, DGND VDD2 DCDC feedback voltage PD 5 µA VOUT B4 I Analog VOUT, GNDC VDDCtrl, Feedback input VREF G8 O Analog VCC7, REFGND Band-gap voltage No VRTC B5 O Power VCC7, REFGND LDO Regulator output PD 5 µA V5IN A5 I Power V5IN, GNDC VDDCtrl, 5-V input |
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