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CYUSB2014-BZXI 데이터시트(PDF) 19 Page - Infineon Technologies AG

부품명 CYUSB2014-BZXI
상세설명  SuperSpeed USB Controller
PDF  82 Pages
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제조업체  INFINEON [Infineon Technologies AG]
홈페이지  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

CYUSB2014-BZXI 데이터시트(HTML) 19 Page - Infineon Technologies AG

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Datasheet
19
001-52136 Rev. *Y
2022-08-11
EZ-USB FX3
SuperSpeed USB Controller
Clocking
10
Clocking
FX3 allows either a crystal to be connected between the XTALIN and XTALOUT pins or an external clock to be
connected at the CLKIN pin. The XTALIN, XTALOUT, CLKIN, and CLKIN_32 pins can be left unconnected if they are
not used.
Crystal frequency supported is 19.2 MHz, while the external clock frequencies supported are 19.2, 26, 38.4, and
52 MHz.
FX3 has an on-chip oscillator circuit that uses an external 19.2-MHz (±100 ppm) crystal (when the crystal option
is used). An appropriate load capacitance is required with a crystal. Refer to the specification of the crystal used
to determine the appropriate load capacitance. The FSLC[2:0] pins must be configured appropriately to select
the crystal- or clock-frequency option. The configuration options are shown in Table 3.
Clock inputs to FX3 must meet the phase noise and jitter requirements specified in Table 4.
The input clock frequency is independent of the clock and data rate of the FX3 core or any of the device interfaces.
The internal PLL applies the appropriate clock multiply option depending on the input frequency.
Table 3
Crystal/clock frequency selection
FSLC[2]
FSLC[1]
FSLC[0]
Crystal/clock frequency
0
0
0
19.2-MHz crystal
1
0
0
19.2-MHz input CLK
1
0
1
26-MHz input CLK
1
1
0
38.4-MHz input CLK
1
1
1
52-MHz input CLK
Table 4
FX3 input clock specifications
Parameter
Description
Specification
Units
Min
Max
Phase noise
100-Hz offset
–
–75
dB
1-kHz offset
–
–104
10-kHz offset
–
–120
100-kHz offset
–
–128
1-MHz offset
–
–130
Maximum frequency
deviation
–
–
150
ppm
Duty cycle
–
30
70
%
Overshoot
–
–
3
Undershoot
–
–
–3
Rise time/fall time
–
–
3
ns



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