DI25 datasheet(77/416 Pages) MICROCHIP

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DS30010118D-page 77

PIC24FJ256GA705 FAMILY

6.6.2

PROGRAMMING A DOUBLE WORD

OF FLASH PROGRAM MEMORY

If a Flash location has been erased, it can be pro-

grammed using Table Write instructions to write two

instruction words (2 x 24-bit) into the write latch. The

TBLPAG register is loaded with the address of the write

latches and the NVMADRU/NVMADR registers are

loaded with the address of the first of the two instruction

words to be programmed. The TBLWTL and TBLWTH

instructions write the desired data into the write latches.

To configure the NVMCON register for a two-word write,

set the NVMOPx bits (NVMCON<3:0>) to ‘0001’. The

write is performed by executing the unlock sequence

and setting the WR bit. An equivalent procedure in ‘C’,

using the MPLAB® XC16 compiler and built-in hardware

functions, is shown in Example 6-3.

TABLE 6-3:

PROGRAMMING A DOUBLE WORD OF FLASH PROGRAM MEMORY

Step 1: Initialize the TBLPAG register for writing to the latches.

MOV

#0xFA, W12

MOV

W12, TBLPAG

Step 2: Load W0:W2 with the next two packed instruction words to program.

MOV

#<LSW0>, W0

MOV

#<MSB1:MSB0>, W1

MOV

#<LSW1>, W2

Step 3: Set the Read Pointer (W6) and Write Pointer (W7), and load the (next set of) write latches.

CLR

TBLWTL

[W6++], [W7]

TBLWTH.B [W6++], [W7++]

TBLWTH.B [W6++], [++W7]

TBLWTL.W [W6++], [W7++]

Step 4: Set the NVMADRU/NVMADR register pair to point to the correct address.

MOV

#DestinationAddress<15:0>, W3

MOV

#DestinationAddress<23:16>, W4

MOV

W3, NVMADR

MOV

W4, NVMADRU

Step 5: Set the NVMCON register to program two instruction words.

MOV

#0x4001, W10

MOV

W10, NVMCON

NOP

Step 6: Initiate the write cycle.

MOV

#0x55, W1

MOV

W1, NVMKEY

MOV

#0xAA, W1

MOV

W1, NVMKEY

BSET

NVMCON, #WR

NOP

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