HT48C10 datasheet(47/59 Pages) HOLTEK

47 / 59 page

SZ [m].i

Skip if bit “i” of the data memory is zero

Description

If bit “i” of the specified data memory is zero, the following instruction,

fetched during the current instruction execution, is discarded and a dummy

cycle is replaced to get the proper instruction (two cycles). Otherwise proceed

with the next instruction (one cycle).

Operation

Skip if [m].i=0

Affected flag(s)

TC2

TC1

–

––

–––

TABRDC [m]

Move the ROM code (current page) to TBLH and data memory

Description

The low byte of ROM code (current page) addressed by the table pointer

(TBLP) is moved to the specified data memory and the high byte transferred

to TBLH directly.

Operation

[m]

← ROM code (low byte)

TBLH

← ROM code (high byte)

Affected flag(s)

TC2

TC1

–

––

–––

TABRDL [m]

Move the ROM code (last page) to TBLH and data memory

Description

The low byte of ROM code (last page) addressed by the table pointer (TBLP)

is moved to the data memory and the high byte transferred to TBLH directly.

Operation

[m]

← ROM code (low byte)

TBLH

← ROM code (high byte)

Affected flag(s)

TC2

TC1

–

––

–––

XOR A,[m]

Logical XOR accumulator with data memory

Description

Data in the accumulator and the indicated data memory perform a bitwise

logical Exclusive_OR operation and the result is stored in the accumulator.

Operation

ACC

← ACC “XOR” [m]

Affected flag(s)

TC2

TC1

–––

–

√

––

HT48CXX/HT48RXX

25th May ’99

HT48C10 데이터시트(PDF) 47 Page - Holtek Semiconductor Inc

HT48C10 데이터시트(HTML) 47 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

데이터시트 다운로드

링크 URL