| 전자부품 데이터시트 검색엔진 |
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L9963T 데이터시트(PDF) 15 Page - STMicroelectronics |
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L9963T 데이터시트(HTML) 15 Page - STMicroelectronics |
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15 / 45 page ![]() L9963T state L9963T configuration TXAMP sampling Note Normal state Master (NSLAVE = 1) The TXAMP setting is simply resynchronized (TTXAMP_SETUP and TTXAMP_HOLD requirements still apply) and deglitched (TTXAMP_DEGLITCH filter still present), but it is not latched upon NCS assertion. The new amplitude setting is applied to the TX interface as soon as the transmission of the SPI frame over the isolated SPI interface begins. In case several SPI frames are being pushed into the TX queue, the setting applied depends on the last one latched (no pipelining supported). Stand-by state Slave/Master (NSLAVE = X) The new TXAMP setting is latched during the wakeup sequence. Hence, the TXAMP pin shall be stable TTXAMP_SETUP before the DIS high → low transition is applied and shall not change during TWAKEUP. - Reset state Slave/Master (NSLAVE = X) The initial TXAMP setting is latched during the first power up sequence. Hence, the TXAMP pin shall be stable before VDD is applied and shall not change duringTFIRST_POWERUP. - It is recommended to apply the same TXAMP setting to all the devices communicating on the bus, in order to keep a constant SNR in every communication phase. In order to meet standby consumption requirements, MCU must release the open drain output connected to TXAMP while L9963T is in Stand-by state. Figure 9. TXAMP pin structure TXAMP R IN_PU VIO TO OPEN DRAIN OUTPUT V3V3_STBY TXAMP 3.2.1.8 Electrical parameters - Digital I/O 3.2.1.8.1 Digital input All parameters are tested and guaranteed in the following conditions, unless otherwise specified: 4.5 V ≤ VVDD ≤ 5.5 V ; -40 °C < Tj < 125 °C Table 11. Digital input electrical characteristics Symbol Parameters Test conditions Min Typ Max Unit VIN_L Logic input low voltage. - - - 0.8 V VIN_H Logic input high voltage. - 1.8 - - V L9963T Pin configuration DS13590 - Rev 4 page 15/45 |
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