SR6P7C8 datasheet(5/7 Pages) STMICROELECTRONICS

부품명	SR6P7C8

상세설명	Stellar SR6 P7 line — 32-bit ArmR CortexR‑R52 automotive integration MCU 6x CortexR‑R52 cores, 20 MB NVM (2x 19.5 MB “OTA X2”) 8.2 MB RAM, with embedded virtualization, safety and security

PDF	7 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

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5 / 7 page

1.3

Block diagram

The figure below shows the top-level block diagram.

Figure 1. Block diagram

Security

Accelerators

COM Accelerator

Cortex-M4 LS “DME”

ADC Manager

Cortex-M4 “DSPH”

DFA

Memories

RAM 8.2MB

PCM 20MB

Data PCM 640KB

System

HW based embedded

Virtualization

ASIL D SEooC

Safe Network on chip w. QOS / Firewalling

15x SWT

4x4x CRC

Debug & Trace

Lock-Step

Cortex®-R52+

I-/D-

Cache

TCM

Lock-Step

Cortex®-R52+

I-/D-

Cache

TCM

Lock-Step

Cortex®-R52+

I-/D-

Cache

TCM

Lock-Step

Cortex®-R52+

I-/D-

Cache

TCM

Split-Lock

Cortex®-R52+

I-/D-

Cache

TCM

Cortex®-R52+

I-/D-

Cache

TCM

NEON

Analog / Timers

SAR ADCs

12x 12bit + 4x 9bit comp

12x SD ADC 16bit

GTM4154

1x 64bit GST

DSPL (1/SD ADC)

Hi-Res Timer

Connectivity

12x CAN FD

2x I2C

2x SENT (30ch)

10x SPI

2x PSI5

2x 1G-100MB

2x FlexRAY

11x LIN

2x LFAST (C2C)

4x MSC / 2x MSC+

1x Octal SPI w. Hyperbus

2x CAN XL

4x DMA

HSM

4x AES Light

Lockstep

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