L99MOD50XP datasheet(30/42 Pages) STMICROELECTRONICS

30 / 42 page

SPI - control and status registers

L99MOD50XP

30/42

DS12615 Rev 4

SPI - control and status registers

5.1

Control register 0

5.2

Control register 1

Table 24. Control register 0 (read/write)

Bit

Name

Comment

OUT1 – HS on/off

If a bit is set the selected output driver is switched on. If the corresponding PWM

enable bit is set the driver is only activated if PWM1 (PWM2) input signal is high. The

outputs of OUT1-OUT6 are half bridges. If the bits of HS- and LS-driver of the same

half bridge are set, the internal logic prevents that both drivers of this output stage can

be switched on simultaneously in order to avoid a high internal current from Vs to

GND.

OUT1 – LS on/off

OUT2 – HS on/off

OUT2 – LS on/off

OUT3 – HS on/off

OUT3 – LS on/off

OUT4 – HS on/off

OUT4 – LS on/off

OUT5 – HS on/off

OUT5 – LS on/off

OUT6 – HS on/off

OUT6 – LS on/off

Reserved (has to be set to '0')

Enable bit

If enable bit is set the device will be switched in active mode. If enable bit is cleared,

the device enters standby mode and all bits are cleared.

Table 25. Control register 1 (read/write)

Bit

Name

Comment

OUT7 – HS1

on/off

OUT7/8

OUT7 – HS2

on/off

HS1

HS2

Mode

Off

OUT8 – HS1

on/off

Low on-resistance

High on-resistance

OUT8 – HS2

on/off

Off

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