MEC1632 datasheet(90/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 90

 2012-2018 Microchip Technology Inc.

6.10.1

LPC BUS MONITOR REGISTER

LPCPD_STATUS

This bit reflects the state of the LPCPD# input pin. The LPCPD_Status is the inverse of the LPCPD# pin (see Section

6.7, "LPC Clock Run and LPC Power Down Behavior," on page 84).

When the LPCPD_Status bit is ‘0b’, the LPCPD# input pin is de-asserted (that is, the pin has the value ‘1b’). When the

LPCPD_Status bit is ‘1b’, the LPCPD# input pin is asserted (that is, the pin has the value ‘0b’).

An interrupt to the EC will be generated on either edge of LPCPD#. See Section 6.5, "Host Interrupts to EC," on page 84.

LRESET_STATUS

This bit reflects the state of the LRESET# input pin. The LRESET_Status is the inverse of the LRESET# pin (see Section

6.2.3, "Resets," on page 81).

When the LRESET_Status bit is ‘0b’, the LRESET# input pin is de-asserted (that is, the pin has the value ‘1b’). When

the LRESET_Status bit is ‘1b’, the LRESET# input pin is asserted (that is, the pin has the value ‘0b’).

An interrupt to the EC will be generated on either edge of LRESET#. See Section 6.5, "Host Interrupts to EC," on

page 84.

TABLE 6-8:

LPC BUS MONITOR REGISTER

HOST OFFSET

N/A

N/A HOST SIZE

EC ADDRESS

FF_3104h

32-bit EC SIZE

POWER

VTR

00h nSYS_RST DEFAULT

BUS

LPC SPB

BYTE[3:1] BIT

D31

D30

D29

…

D10

HOST TYPE

EC TYPE

BIT NAME

Reserved

BYTE0 BIT

HOST TYPE

EC TYPE

BIT NAME

Reserved

LRESET_

Status

LPCPD_

Status

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