STA335BWSQS datasheet(31/70 Pages) STMICROELECTRONICS

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STA335BWSQS

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6.3.2

DDX® compensating pulse size register

Table 6:

6.3.3

Over-current warning detect adjustment bypass

The OCWARN input is used to indicate an over-current warning condition. When OCWARN

is asserted (set to 0), the power control block forces an adjustment to the modulation limit

(default is -3 dB) in an attempt to eliminate the over-current warning condition. Once the

over-current warning volume adjustment is applied, it remains in this state until reset is

applied. The level of adjustment can be changed via the TWOCL (thermal warning/over

current limit) setting which is address 0x37 of the user defined coefficient RAM.

Table 24.

CSZ

Bit

RST

Name

Description

2RW

CSZ0

When OM[1,0] = 11, this register determines the

size of the DDX compensating pulse from 0 clock

ticks to 15 clock periods.

3RW

CSZ1

4RW

CSZ2

5RW

CSZ3

Table 25.

Compensating pulse size

CSZ[3:0]

Compensating Pulse Size

0000

0 ns (0 tick) compensating pulse size

0001

20 ns (1 tick) clock period compensating pulse size

……

1111

300 ns (15 ticks) clock period compensating pulse size

Table 26.

OCRB

Bit

RST

Name

Description

OCRB

0: Over-Current warning Adjustment enabled

1: Over-Current warning Adjustment disabled

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