전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

STM32L062C8 데이터시트(PDF) 24 Page - STMicroelectronics

부품명 STM32L062C8
상세설명  Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, 64 KB Flash,8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC, AES
PDF  124 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L062C8 데이터시트(HTML) 24 Page - STMicroelectronics

Back Button STM32L062C8 Datasheet HTML 20Page - STMicroelectronics STM32L062C8 Datasheet HTML 21Page - STMicroelectronics STM32L062C8 Datasheet HTML 22Page - STMicroelectronics STM32L062C8 Datasheet HTML 23Page - STMicroelectronics STM32L062C8 Datasheet HTML 24Page - STMicroelectronics STM32L062C8 Datasheet HTML 25Page - STMicroelectronics STM32L062C8 Datasheet HTML 26Page - STMicroelectronics STM32L062C8 Datasheet HTML 27Page - STMicroelectronics STM32L062C8 Datasheet HTML 28Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 24 / 124 page
background image
Functional overview
STM32L062x8
24/124
DS10183 Rev 11
Figure 2. Clock tree
MSv34799V1
Legend:
HSE = High-speed external clock signal
HSI = High-speed internal clock signal
LSI = Low-speed internal clock signal
LSE = Low-speed external clock signal
MSI = Multispeed internal clock signal
Watchdog LS
LSI RC
LSE OSC
RTC
LSI tempo
@V33
/ 1,2,4,8,16
HSI16 RC
Level shifters
RC 48MHz
Level shifters
Clock
Recovery
System
/ 8
LSE tempo
MSI RC
Level shifters
/ 2,3,4
Level shifters
PLL
X
3,4,6,8,12,16,
24,32,48
AHB
PRESC
/ 1,2,…, 512
@V33
@V33
@V33
@V18
@V18
@V18
@V18
usb_en
rng_en
48MHz
USBCLK
48MHz RNG
I2C1CLK
LPUART/
UARTCLK
LPTIMCLK
LSE
HSI16
SYSCLK
PCLK
LSI
not (sleep or
deepsleep)
not (sleep or
deepsleep)
not deepsleep
not deepsleep
HCLK
CK_PWR
FCLK
PLLCLK
HSI16
MSI
LSE
LSI
Dedicated 48MHz PLL output
@V33
@VDDCORE
ck_rchs
/ 1,4
HSI16
HSI48
MSI
1 MHz
ck_pllin
Enable Watchdog
RTC2 enable
ADC enable
ADCCLK
LSD
LSD
MCO
MCOSEL
PLLSRC
RTCSEL
System
Clock
APB1
PRESC
/ 1,2,4,8,16
Peripheral
clock enable
PCLK1 to APB1
peripherals
32 MHz
max.
If (APB1 presc=1) x1
else x2)
to TIMx
Peripheral
clock enable
APB2
PRESC
/ 1,2,4,8,16
Peripheral
clock enable
PCLK2 to APB2
peripherals
32 MHz
max.
If (APB2 presc=1) x1
else x2)
to TIMx
Peripheral
clock enable
Peripheral
clock enable
Peripheral
clock enable
SysTick
Timer
HSI48MSEL



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com