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MPC8540 데이터시트(PDF) 211 Page - Freescale Semiconductor, Inc

부품명 MPC8540
상세설명  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 데이터시트(HTML) 211 Page - Freescale Semiconductor, Inc

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Functional Description
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
4-25
If the MPC8540 is the initial master of the RapidIO clock, then it can derive the RapidIO transmit
clock from either its internal platform (CCB) clock or from a dedicated LVDS clock input,
RIO_TX_CLK_IN / RIO_TX_CLK_IN.
4.4.4.3
Ethernet Clocks
The Ethernet blocks operate asynchronously with respect to the rest of the device. These blocks
use receive and transmit clocks supplied by their respective PHY chips, plus a 125-MHz clock
input for gigabit protocols. Data transfers are synchronized to the CCB clock internally.
4.4.4.4
Real Time Clock
As shown in Figure 4-8, the real time clock (RTC) input can optionally be used to clock the e500
core timer facilities. RTC can also be used (optionally) by the MPC8540 programmable interrupt
controller (PIC) global timer facilities. The RTC is separate from the e500 core clock and is
intended to support relatively low frequency timing applications. The RTC frequency range is
specified in the MPC8540 Integrated Processor Hardware Specifications, but the maximum value
should not exceed one-eighth of the core frequency.
Before being distributed to the core time base, RTC is sampled and synchronized with the CCB
clock.
The clock source for the core time base is specified by two fields in HID0: time base enable
(TBEN), and select time base clock (SEL_TBCLK). If the time base is enabled, (HID0[TBEN] is
set), the clock source is determined as follows:
•
HID0[SEL_TBCLK] = 0, the time base is updated every 8 CCB clocks
•
HID0[SEL_TBCLK] = 1, the time base is updated on the rising edge of RTC
The default source of the time base is the CCB clock divided by eight. For more details, see the
section “Hardware Implementation-Dependent Register (HID0),” in the “PowerPC™ e500 Core
Complex Reference Manual.”
Section 10.3.2.6, “Timer Control Register (TCR),” provides additional information on the use of
the RTC signal to clock the global timers in the PIC unit.



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